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課程名稱 |
軟硬體共同設計
HARDWARE SOFTWARE CODESIGN |
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開課學期 |
98-1 |
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授課對象 |
電機資訊學院 電機工程學研究所 |
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授課教師 |
王勝德 |
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課號 |
EEE5009 |
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課程識別碼 |
943 U0090 |
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班次 |
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學分 |
3 |
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全/半年 |
半年 |
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必/選修 |
選修 |
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上課時間 |
星期二6,7,8(13:20~16:20) |
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上課地點 |
博理103 |
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備註 |
總人數上限：45人 |
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課程簡介影片 |
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核心能力關聯 |
核心能力與課程規劃關聯圖 |
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課程大綱
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課程概述 |
1. Codesign overview
2. Models and methodologies of system design
3. SystemC specification language
4. Hardware software partitioning and scheduling
5. Cosimulation, synthesis and verifications
6. Architecture mapping, HW-SW Interfaces and Reconfigurable computing
7. System on Chip (SoC) and IP cores
8. Low-Power Techniques in Embedded Systems
9. Consideration of RTOS in Hardware Software Codesign
10. Design Projects, Nios embedded processor and SOPC builder, Floating-point operations custom instruction, DMA and inner-product computation, FIR and IIR Filters using SW and Multiply Accumulate (MAC) cores, TCP/IP HW/SW, VoIP HW/SW implementation |
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課程目標 |
1. To be familiar with hardware-software codesign concepts
2. To learn the system level modeling language.
3. To practice the system level modeling and design. |
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課程要求 |
Prerequisite:
–Computer Architecture, C/C++ Programming, Operating Sytems
Grading policy:
–Late submission of homeworks is discounted 10% upto 2 days.
Evaluation:
–Projects: 35 %
–Mid-term: 20 %
–Final: 20%
–Homeworks and Labs: 25%
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預期每週課後學習時數 |
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Office Hours |
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指定閱讀 |
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參考書目 |
教科書： (Lecture notes and lab notes posted on the course web.)
參考書目： Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems, by Frank Ghenassia, Springer, 2005
Modeling Embedded Systems and SoCs: Concurrency and Time in Models of Computation, by Axel Jantsch, 2004.
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評量方式
(僅供參考) |
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